1. Field of the Invention
The invention relates to a semiconductor device and a method of forming the same. More particularly, the present invention relates to a gate-all-around (GAA) nanowire field-effect transistor (FET) device with source and drain dislocation and a fabrication method thereof.
2. Description of the Prior Art
It is well known in the art that when a suitable stress in induced in the channel region of a metal-oxide-semiconductor (MOS) transistor, the carrier mobility can be increased, thereby improving the drive current.
Typically, it is preferably to induce tensile stress in the channel region along a source-to-drain direction of an NMOS device and induce compressive stress in the channel region along a source-to-drain direction of a PMOS device. The induced stress may distort semiconductor crystal lattice, thus affecting the energy band alignment of the semiconductor and charge transport properties.
Further, it known that dislocation may be introduced into the source or drain region of the MOS transistor to improve the device performance.